In conventional memories such as a random access memory (RAM) or a read only memory (ROM), data is stored at particular locations denoted as addresses. To retrieve data, a user specifies the associated address. For high-speed searches, such an approach creates a bottleneck in that the addresses are examined sequentially before the desired data can be retrieved. As a result, content addressable memory (CAM) was developed that operates in an opposite fashion to conventional memories. In other words, a user provides data to a CAM, which returns the associated address. Just like RAM/ROM, data storage in a CAM is organized into words. The word size is arbitrary. For example, a CAM may be organized to store 4-byte words (the length of each word typically denoted as the “width” of the corresponding CAM). Similarly, the number of words in any given CAM is also arbitrary (the number of words typically denoted as the “depth” of the corresponding CAM). A user thus presents a word to a CAM, which then compares the presented word simultaneously to all its stored words.
This simultaneous comparison across all stored words in CAM results in a search time that is much faster than comparable RAM/ROM operation. The results of the simultaneous comparison at each stored word in a CAM are typically expressed in the voltage of corresponding “match” lines. Each stored word may have its own corresponding match line. Prior to the comparison, each match line is typically charged to the CAM's internal supply voltage, VDD. If the presented word (typically denoted as the “comparand” word) does not match the stored word, the corresponding match line is discharged to ground. Thus, the vast majority of match lines are discharged in a typical CAM search. These match lines may be denoted as “unmatched” match lines. Although the parallel search across all stored words is thus speedy, a problem is presented because of the charge being wasted as each unmatched match line is discharged. Moreover, if the word size is increased, the capacitance (and hence stored charge) of each match line increases. Thus, a relatively large amount of power may be wasted in conventional CAM designs.
Power consumption is not the only problem with conventional CAM design. Because the capacitance of each match line can be relatively large, the amount of time it takes to pull each unmatched match line to ground can be relatively long. Thus, the speed advantage of CAM searches would be hampered if a “full-swing” (VDD or ground) decision as to the state (matched or unmatched) of each match line is made. Thus, conventional CAMs typically employ sophisticated sense amplifiers that do not need a full voltage swing to make a match decision. For example, such a sense amplifier may declare a match line to be unmatched if it senses that the voltage has dropped some fraction (e.g., 200 to 300 millivolts) below VDD. Such sensitive limited-swing (less than full swing) sense amplifiers are unreliable compared to a full-swing sense amplifiers because of their reduced margin for error. In addition, limited-swing sense amplifiers demand considerably more power.
Accordingly, there is a need in the art for improved CAM architectures that provide more power-efficient searches while demanding less die area.